This invention is in the field of transistorized amplifiers, and relates more specifically to linear differential transconductance amplifiers having enhanced frequency response which have been corrected in some manner to improve linearity.
One approach to improving the frequency response of a differential amplifier is shown in U.S. Pat. No. 3,633,120, entitled "Amplifier Circuit". This has become more commonly known as an "f.sub.T doubler". The name is derived from the operation of the circuit which effectively doubles the current output of the amplifier for the same voltage input, at a given frequency. At high frequencies, when the transistors are in 6 dB per octave rolloff, the f.sub.T doubler will provide the same current output at substantially twice the operating frequency of a single differential pair amplifier.
The f.sub.T doubler as disclosed in the above patent is not compensated for linearity. A circuit which retained the improved frequency response of the original f.sub.T doubler and included a linearity correction circuit was disclosed in U.S. Pat. No. 4,267,516, entitled "Common-Emitter f.sub.T Doubler Amplifier Employing a Feed Foward Amplifier to Reduce Non-Linearities and Thermal Distortion". This circuit included an error amplifier which sensed an error voltage in the main signal amplifier and generated an appropriate error correction current which was summed with the main differential output current to cancel nonlinearities.
However, the demands of the electronics industry have created a need for circuits having increasingly higher speed and precision. Therefore, what is desired is a circuit which provides even more frequency response than the f.sub.T doubler, yet retains precise nonlinearity correction.